1. Field of the Invention
The present invention relates to a test apparatus.
2. Description of the Related Art
As a high-speed data transmission method for data transmission between semiconductor devices, the source synchronous method is known. With such a method, in addition to a data signal, a clock signal is transmitted via two transmission lines synchronously with the data signal. For example, where the transmission rate is 1.6 GHz, an 800 MHz reference clock and 1.6 Gbps of data, which is assigned to each positive edge and each negative edge of the reference clock, are transmitted. On the receiver side, the data is latched at a positive edge timing or a negative edge timing of the reference clock.
In a case of testing a device under test having a high-speed interface employing such a source synchronous method, the relative phase difference is measured between the reference clock and the data, at the same frequency as that employed in actual operation or at a frequency which is intentionally made to differ from that frequency. Furthermore, judgment is made whether or not the relative phase difference thus measured is within a range determined by the test specifications.
For example, the relative phase difference can be acquired by using a TDC (time to digital converter) to measure the change point (change timing) of the reference clock and the change point of the data, and calculating the difference data therebetween. A multi-strobe circuit, for example, is employed in the measurement of the relative phase difference (see Patent Document 1). By employing such a test method, it can be affirmed whether or not such a device under test has a guaranteed setup margin and hold margin.